An Efficient Hardware Architecture for Sparse Convolution using Linear Feedback Shift Registers

Murad Qasaimeh, Joseph Zambreno, Phillip H. Jones. An Efficient Hardware Architecture for Sparse Convolution using Linear Feedback Shift Registers. In 32nd IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2021, Virtual Conference, USA, July 7-9, 2021. pages 250-257, IEEE, 2021. [doi]

Abstract

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