A FPGA-Based Dual-Pixel Processing Pipelined Hardware Accelerator for Feature Point Detection Part in SIFT

Jingbang Qiu, Tianci Huang, Takeshi Ikenaga. A FPGA-Based Dual-Pixel Processing Pipelined Hardware Accelerator for Feature Point Detection Part in SIFT. In Jinhwa Kim, Dursun Delen, Jinsoo Park, Franz Ko, Chen Rui, Jong Hyung Lee, Wang Jian, Gang Kou, editors, International Conference on Networked Computing and Advanced Information Management, NCM 2009, Fifth International Joint Conference on INC, IMS and IDC: INC 2009: International Conference on Networked Computing, IMS 2009: International Conference on Advan. pages 1668-1674, IEEE Computer Society, 2009. [doi]

Abstract

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