Marco Rabozzi, Gianluca Carlo Durelli, Antonio Miele, John Lillis, Marco Domenico Santambrogio. Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation. IEEE Trans. VLSI Syst., 25(1):151-164, 2017. [doi]
@article{RabozziDMLS17, title = {Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation}, author = {Marco Rabozzi and Gianluca Carlo Durelli and Antonio Miele and John Lillis and Marco Domenico Santambrogio}, year = {2017}, doi = {10.1109/TVLSI.2016.2562361}, url = {http://dx.doi.org/10.1109/TVLSI.2016.2562361}, researchr = {https://researchr.org/publication/RabozziDMLS17}, cites = {0}, citedby = {0}, journal = {IEEE Trans. VLSI Syst.}, volume = {25}, number = {1}, pages = {151-164}, }