Georgi I. Radulov, Patrick J. Quinn. 2 1GSps 12b self-calibrated 40nm CMOS DAC cell with SFDR>60dB up to 200MHz and IM3 < - 60dB up to 350MHz. In European Conference on Circuit Theory and Design, ECCTD 2020, Sofia, Bulgaria, September 7-10, 2020. pages 1-4, IEEE, 2020. [doi]
@inproceedings{RadulovQ20, title = {2 1GSps 12b self-calibrated 40nm CMOS DAC cell with SFDR>60dB up to 200MHz and IM3 < - 60dB up to 350MHz}, author = {Georgi I. Radulov and Patrick J. Quinn}, year = {2020}, doi = {10.1109/ECCTD49232.2020.9218326}, url = {https://doi.org/10.1109/ECCTD49232.2020.9218326}, researchr = {https://researchr.org/publication/RadulovQ20}, cites = {0}, citedby = {0}, pages = {1-4}, booktitle = {European Conference on Circuit Theory and Design, ECCTD 2020, Sofia, Bulgaria, September 7-10, 2020}, publisher = {IEEE}, isbn = {978-1-7281-7183-8}, }