A 28-nm CMOS 7-GS/s 6-bit DAC With DfT Clock and Memory Reaching SFDR >50 dB Up to 1 GHz - researchr publication references

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Georgi I. Radulov, Patrick J. Quinn, Arthur H. M. van Roermund. A 28-nm CMOS 7-GS/s 6-bit DAC With DfT Clock and Memory Reaching SFDR >50 dB Up to 1 GHz. IEEE Trans. VLSI Syst., 23(9):1941-1945, 2015. [doi]

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