Tutorial: How to Use Model Checking to Analyze Circuits at the Transistor Level

Michael Raitza, Steffen Märcker. Tutorial: How to Use Model Checking to Analyze Circuits at the Transistor Level. In International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2023, Hamburg, Germany, September 17-22, 2023. pages 1-2, IEEE, 2023. [doi]

@inproceedings{RaitzaM23,
  title = {Tutorial: How to Use Model Checking to Analyze Circuits at the Transistor Level},
  author = {Michael Raitza and Steffen Märcker},
  year = {2023},
  doi = {10.1145/3607888.3608939},
  url = {https://doi.org/10.1145/3607888.3608939},
  researchr = {https://researchr.org/publication/RaitzaM23},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2023, Hamburg, Germany, September 17-22, 2023},
  publisher = {IEEE},
  isbn = {979-8-4007-0289-1},
}