George P. Rajesh, C. K. Deepthy, M. Mary Jermila, K. P. Raghunath, Vishnu N. Aparna. Force Rebalance with Multi-bit Sigma-Delta implemented with FPGA for Precision Rate Sensor. In TENCON 2019 - 2019 IEEE Region 10 Conference (TENCON), Kochi, India, October 17-20, 2019. pages 654-657, IEEE, 2019. [doi]
Abstract is missing.