Area-Efficient Auto-Write-Terminate Circuit for NV Latch and Logic-In-Memory Applications

Jagadish Rajpoot, Shivam Verma. Area-Efficient Auto-Write-Terminate Circuit for NV Latch and Logic-In-Memory Applications. IEEE Trans. Circuits Syst. II Express Briefs, 70(7):2630-2634, July 2023. [doi]

Abstract

Abstract is missing.