Altering LUT configuration for wear-out mitigation of FPGA-mapped designs

Parthasarathy M. B. Rao, Abdulazim Amouri, Saman Kiamehr, Mehdi Baradaran Tahoori. Altering LUT configuration for wear-out mitigation of FPGA-mapped designs. In 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013. pages 1-8, IEEE, 2013. [doi]

Abstract

Abstract is missing.