PIR-DSP: An FPGA DSP Block Architecture for Multi-precision Deep Neural Networks

SeyedRamin Rasoulinezhad, Hao Zhou, Lingli Wang, Philip H. W. Leong. PIR-DSP: An FPGA DSP Block Architecture for Multi-precision Deep Neural Networks. In 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2019, San Diego, CA, USA, April 28 - May 1, 2019. pages 35-44, IEEE, 2019. [doi]

Abstract

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