Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatterjee, Saibal Mukhopadhyay, Sudhakar Yalamanchili. An energy efficient cache design using spin torque transfer (STT) RAM. In Vojin G. Oklobdzija, Barry Pangle, Naehyuck Chang, Naresh R. Shanbhag, Chris H. Kim, editors, Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010. pages 389-394, ACM, 2010. [doi]
Abstract is missing.