A Statistical Model for Estimating the Effect of Process Variations on Delay and Slew Metrics for VLSI Interconnects

J. V. R. Ravindra, M. B. Srinivas. A Statistical Model for Estimating the Effect of Process Variations on Delay and Slew Metrics for VLSI Interconnects. In Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany. pages 325-330, IEEE, 2007. [doi]

Abstract

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