Alin Razafindraibe, Philippe Maurine, Michel Robert, Marc Renaudin. Security evaluation of dual rail logic against DPA attacks. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 181-186, IEEE, 2006. [doi]
Abstract is missing.