William Redman-White, Martin Bugbee, Steve Dobbs, X. Wu, Richard A. H. Balmford, Jonah Nuttgens, Umer Salim Kiani, Richard Clegg, Gerrit W. den Besten. A robust 1.5Gb/s + 3Gb/s serial PHY with feed-forward correction clock and data recovery. In William Redman-White, Anthony J. Walton, editors, ESSCIRC 2008 - 34th European Solid-State Circuits Conference, Edinburgh, Scotland, UK, 15-19 September 2008. pages 170-173, IEEE, 2008. [doi]
Abstract is missing.