Greg J. Regnier, Dave B. Minturn, Gary L. McAlpine, Vikram A. Saletore, Annie Foong. ETA: experience with an Intel® Xeon™ processor as a packet processing engine. In Proceedings of the 11th Annual IEEE Symposium on High Performance Interconnects, HOTIC 2003, August 20-22, 2003, Stanford, CA, USA. pages 76-82, IEEE, 2003. [doi]
@inproceedings{RegnierMMSF03,
title = {ETA: experience with an Intel® Xeon™ processor as a packet processing engine},
author = {Greg J. Regnier and Dave B. Minturn and Gary L. McAlpine and Vikram A. Saletore and Annie Foong},
year = {2003},
doi = {10.1109/CONECT.2003.1231481},
url = {http://doi.ieeecomputersociety.org/10.1109/CONECT.2003.1231481},
researchr = {https://researchr.org/publication/RegnierMMSF03},
cites = {0},
citedby = {0},
pages = {76-82},
booktitle = {Proceedings of the 11th Annual IEEE Symposium on High Performance Interconnects, HOTIC 2003, August 20-22, 2003, Stanford, CA, USA},
publisher = {IEEE},
isbn = {0-7695-2012-X},
}