An FPGA-in-the-loop approach for HDL motor controller verification - researchr publication

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Paul Rogers, Rajesh Kavasseri, Scott C. Smith. An FPGA-in-the-loop approach for HDL motor controller verification. In International Conference on ReConFigurable Computing and FPGAs, ReConFig 2017, Cancun, Mexico, December 4-6, 2017. pages 1-6, IEEE, 2017. [doi]

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