A system for asynchronous high-speed chip to chip communication

Per Torstein Røine. A system for asynchronous high-speed chip to chip communication. In 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 96), March 18-21, 1996, Aizu-Wakamatsu, Fukushima, JAPAN. pages 2-10, IEEE Computer Society, 1996. [doi]

Abstract

Abstract is missing.