Energy analysis of bipartition architecture for pipelined circuits

Shanq-Jang Ruan, Edwin Naroska, Yen-Jen Chang, Chia-Lin Ho, Feipei Lai. Energy analysis of bipartition architecture for pipelined circuits. In IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002. pages 7-11, IEEE, 2002. [doi]

Abstract

Abstract is missing.