Joseph F. Ryan 0002, Benton H. Calhoun. A sub-threshold FPGA with low-swing dual-VDD interconnect in 90nm CMOS. In Jacqueline Snyder, Rakesh Patel, Tom Andre, editors, IEEE Custom Integrated Circuits Conference, CICC 2010, San Jose, California, USA, 19-22 September, 2010, Proceedings. pages 1-4, IEEE, 2010. [doi]
Abstract is missing.