Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs

Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia Del Valle. Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs. In R. Iris Bahar, Fabrizio Lombardi, David Atienza, Erik Brunvand, editors, Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010. pages 305-310, ACM, 2010. [doi]

Abstract

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