Bodhisatwa Sadhu, Mark A. Ferriss, Arun Natarajan, Soner Yaldiz, Jean-Olivier Plouchart, Alexander Rylyakov, Alberto Valdes-Garcia, Benjamin D. Parker, Aydin Babakhani, Scott K. Reynolds, Xin Li, Lawrence T. Pileggi, Ramesh Harjani, José A. Tierno, Daniel J. Friedman. A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing. J. Solid-State Circuits, 48(5):1138-1150, 2013. [doi]
@article{SadhuFNYPRVPBRLPHTF13,
title = {A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing},
author = {Bodhisatwa Sadhu and Mark A. Ferriss and Arun Natarajan and Soner Yaldiz and Jean-Olivier Plouchart and Alexander Rylyakov and Alberto Valdes-Garcia and Benjamin D. Parker and Aydin Babakhani and Scott K. Reynolds and Xin Li and Lawrence T. Pileggi and Ramesh Harjani and José A. Tierno and Daniel J. Friedman},
year = {2013},
doi = {10.1109/JSSC.2013.2252513},
url = {http://dx.doi.org/10.1109/JSSC.2013.2252513},
researchr = {https://researchr.org/publication/SadhuFNYPRVPBRLPHTF13},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {48},
number = {5},
pages = {1138-1150},
}