Sean Safarpour, Andreas G. Veneris, Gregg Baeckler, Richard Yuan. Efficient SAT-based Boolean matching for FPGA technology mapping. In Ellen Sentovich, editor, Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006. pages 466-471, ACM, 2006. [doi]
Abstract is missing.