A tamper resistant hardware accelerator for RSA cryptographic applications

Giacinto Paolo Saggese, Luigi Romano, Nicola Mazzocca, Antonino Mazzeo. A tamper resistant hardware accelerator for RSA cryptographic applications. Journal of Systems Architecture, 50(12):711-727, 2004. [doi]

@article{SaggeseRMM04,
  title = {A tamper resistant hardware accelerator for RSA cryptographic applications},
  author = {Giacinto Paolo Saggese and Luigi Romano and Nicola Mazzocca and Antonino Mazzeo},
  year = {2004},
  doi = {10.1016/j.sysarc.2004.04.002},
  url = {http://dx.doi.org/10.1016/j.sysarc.2004.04.002},
  researchr = {https://researchr.org/publication/SaggeseRMM04},
  cites = {0},
  citedby = {0},
  journal = {Journal of Systems Architecture},
  volume = {50},
  number = {12},
  pages = {711-727},
}