Martin Saint-Laurent, Animesh Datta. A low-power clock gating cell optimized for low-voltage operation in a 45-nm technology. In Vojin G. Oklobdzija, Barry Pangle, Naehyuck Chang, Naresh R. Shanbhag, Chris H. Kim, editors, Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010. pages 159-164, ACM, 2010. [doi]
@inproceedings{Saint-LaurentD10,
title = {A low-power clock gating cell optimized for low-voltage operation in a 45-nm technology},
author = {Martin Saint-Laurent and Animesh Datta},
year = {2010},
doi = {10.1145/1840845.1840878},
url = {http://doi.acm.org/10.1145/1840845.1840878},
tags = {optimization},
researchr = {https://researchr.org/publication/Saint-LaurentD10},
cites = {0},
citedby = {0},
pages = {159-164},
booktitle = {Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010},
editor = {Vojin G. Oklobdzija and Barry Pangle and Naehyuck Chang and Naresh R. Shanbhag and Chris H. Kim},
publisher = {ACM},
isbn = {978-1-4503-0146-6},
}