A novel clock generation scheme for globally asynchronous locally synchronous systems: an FPGA-validated approach

Kamran Saleh, Mehrdad Najibi, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi. A novel clock generation scheme for globally asynchronous locally synchronous systems: an FPGA-validated approach. In John Lach, Gang Qu, Yehea I. Ismail, editors, Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005. pages 296-301, ACM, 2005. [doi]

Abstract

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