An FPGA Architecture for ASIC-FPGA Co-design to Streamline Processing of IDSs

Tomoaki Sato, Sorawat Chivapreecha, Phichet Moungnoul, Kohji Higuchi. An FPGA Architecture for ASIC-FPGA Co-design to Streamline Processing of IDSs. In Waleed W. Smari, Joseph Natarian, editors, 2016 International Conference on Collaboration Technologies and Systems, CTS 2016, Orlando, FL, USA, October 31 - November 4, 2016. pages 412-417, IEEE Computer Society, 2016. [doi]

Abstract

Abstract is missing.