ASIC hardware implementations for 512-bit hash function Whirlpool

Akashi Satoh. ASIC hardware implementations for 512-bit hash function Whirlpool. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 2917-2920, IEEE, 2008. [doi]

Abstract

Abstract is missing.