A Framework for Static Analysis of VHDL Code

Marc Schlickling, Markus Pister. A Framework for Static Analysis of VHDL Code. In Christine Rochange, editor, 7th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, Pisa, Italy, July 3, 2007. Volume 07002 of Dagstuhl Seminar Proceedings, Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany, 2007. [doi]

Abstract

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