Simulation-based circuit-activity estimation for FPGAs containing hard blocks

Sean Seeley, Vidya Sankaranaryanan, Zack Deveau, Panagiotis Patros, Kenneth B. Kent. Simulation-based circuit-activity estimation for FPGAs containing hard blocks. In Sungjoo Yoo, Fabiano Hessel, Frédéric Rousseau, Kenneth B. Kent, Kyoungwoo Lee, editors, International Symposium on Rapid System Prototyping, RSP 2017, Shortening the Path from Specification to Prototype, October 19-20, 2017, Seoul, South Korea. pages 36-42, ACM, 2017. [doi]

Authors

Sean Seeley

This author has not been identified. Look up 'Sean Seeley' in Google

Vidya Sankaranaryanan

This author has not been identified. Look up 'Vidya Sankaranaryanan' in Google

Zack Deveau

This author has not been identified. Look up 'Zack Deveau' in Google

Panagiotis Patros

This author has not been identified. Look up 'Panagiotis Patros' in Google

Kenneth B. Kent

This author has not been identified. Look up 'Kenneth B. Kent' in Google