Test planning and test access mechanism design for stacked chips using ILP

Breeta SenGupta, Erik Larsson. Test planning and test access mechanism design for stacked chips using ILP. In IEEE 32nd VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014. pages 1-6, IEEE, 2014. [doi]

Abstract

Abstract is missing.