A High-Performance Parallel Device Simulator for High Electron Mobility Transistors

Natalia Seoane, Antonio J. GarcĂ­a-Loureiro, K. Kalna, A. Asenov. A High-Performance Parallel Device Simulator for High Electron Mobility Transistors. In Gerhard R. Joubert, Wolfgang E. Nagel, Frans J. Peters, Oscar G. Plata, P. Tirado, Emilio L. Zapata, editors, Parallel Computing: Current & Future Issues of High-End Computing, Proceedings of the International Conference ParCo 2005, 13-16 September 2005, Department of Computer Architecture, University of Malaga, Spain. Volume 33 of John von Neumann Institute for Computing Series, pages 407-414, Central Institute for Applied Mathematics, Jülich, Germany, 2005.

Abstract

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