Shayan Shahramian, Behzad Dehlaghi, Joshua Liang, Ryan Bespalko, Dustin Dunwell, James Bailey, Bo Wang, Alireza Sharif Bakhtiar, Michael O'Farrell, Kerry Tang, Anthony Chan Carusone, David Cassan, Davide Tonietto. A 1.41pJ/b 56Gb/s PAM-4 Wireline Receiver Employing Enhanced Pattern Utilization CDR and Genetic Adaptation Algorithms in 7nm CMOS. In IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019. pages 482-484, IEEE, 2019. [doi]
@inproceedings{ShahramianDLBDB19,
title = {A 1.41pJ/b 56Gb/s PAM-4 Wireline Receiver Employing Enhanced Pattern Utilization CDR and Genetic Adaptation Algorithms in 7nm CMOS},
author = {Shayan Shahramian and Behzad Dehlaghi and Joshua Liang and Ryan Bespalko and Dustin Dunwell and James Bailey and Bo Wang and Alireza Sharif Bakhtiar and Michael O'Farrell and Kerry Tang and Anthony Chan Carusone and David Cassan and Davide Tonietto},
year = {2019},
doi = {10.1109/ISSCC.2019.8662421},
url = {https://doi.org/10.1109/ISSCC.2019.8662421},
researchr = {https://researchr.org/publication/ShahramianDLBDB19},
cites = {0},
citedby = {0},
pages = {482-484},
booktitle = {IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019},
publisher = {IEEE},
isbn = {978-1-5386-8531-0},
}