A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology

Noboru Shibata, Kazushige Kanda, T. Shimizu, J. Nakai, Osamu Nagao, N. Kobayashi, M. Miakashi, Yasushi Nagadomi, Takeshi Nakano, T. Kawabe, T. Shibuya, Mario Sako, Kosuke Yanagidaira, Toshifumi Hashimoto, H. Date, Manabu Sato, T. Nakagawa, H. Takamoto, Junji Musha, Takatoshi Minamoto, M. Uda, Dai Nakamura, K. Sakurai, T. Yamashita, J. Zhou, R. Tachibana, Teruo Takagiwa, Takahiro Sugimoto, Mikio Ogawa, Yusuke Ochi, K. Kawaguchi, Masatsugu Kojima, T. Ogawa, Tomoharu Hashiguchi, Ryo Fukuda, M. Masuda, K. Kawakami, T. Someya, Yasuyuki Kajitani, Yuuki Matsumoto, Naohito Morozumi, Jumpei Sato, Namas Raghunathan, Y. L. Koh, S. Chen, J. Lee, Hiroaki Nasu, Hiroshi Sugawara, Koji Hosono, Toshiki Hisada, T. Kaneko, H. Nakamura. A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology. In IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019. pages 210-212, IEEE, 2019. [doi]

@inproceedings{ShibataKSNNKMNN19,
  title = {A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology},
  author = {Noboru Shibata and Kazushige Kanda and T. Shimizu and J. Nakai and Osamu Nagao and N. Kobayashi and M. Miakashi and Yasushi Nagadomi and Takeshi Nakano and T. Kawabe and T. Shibuya and Mario Sako and Kosuke Yanagidaira and Toshifumi Hashimoto and H. Date and Manabu Sato and T. Nakagawa and H. Takamoto and Junji Musha and Takatoshi Minamoto and M. Uda and Dai Nakamura and K. Sakurai and T. Yamashita and J. Zhou and R. Tachibana and Teruo Takagiwa and Takahiro Sugimoto and Mikio Ogawa and Yusuke Ochi and K. Kawaguchi and Masatsugu Kojima and T. Ogawa and Tomoharu Hashiguchi and Ryo Fukuda and M. Masuda and K. Kawakami and T. Someya and Yasuyuki Kajitani and Yuuki Matsumoto and Naohito Morozumi and Jumpei Sato and Namas Raghunathan and Y. L. Koh and S. Chen and J. Lee and Hiroaki Nasu and Hiroshi Sugawara and Koji Hosono and Toshiki Hisada and T. Kaneko and H. Nakamura},
  year = {2019},
  doi = {10.1109/ISSCC.2019.8662443},
  url = {https://doi.org/10.1109/ISSCC.2019.8662443},
  researchr = {https://researchr.org/publication/ShibataKSNNKMNN19},
  cites = {0},
  citedby = {0},
  pages = {210-212},
  booktitle = {IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019},
  publisher = {IEEE},
  isbn = {978-1-5386-8531-0},
}