Yu-Ju Shih, Chih-Tsun Huang, Jing-Jia Liou, Jyu-Yuan Lai, Chih-Wea Wang, Chi-Feng Wu. Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017. pages 1-4, IEEE, 2017. [doi]
Abstract is missing.