Delay analysis of sub-path on fabricated chips by several path-delay tests

Takanobu Shiki, Yasuhiro Takashima, Yuichi Nakamura. Delay analysis of sub-path on fabricated chips by several path-delay tests. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 1595-1598, IEEE, 2010. [doi]

Abstract

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