Yasuhide Shimizu, Shigemitsu Murayama, Kohei Kudoh, Hiroaki Yatsuda. A Split-Load Interpolation-Amplifier-Array 300MS/s 8b Subranging ADC in 90nm CMOS. In 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008. pages 552-553, IEEE, 2008. [doi]
Abstract is missing.