Compiler Control Power Saving Scheme for Multi Core Processors

Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara. Compiler Control Power Saving Scheme for Multi Core Processors. In Eduard Ayguadé, Gerald Baumgartner, J. Ramanujam, P. Sadayappan, editors, Languages and Compilers for Parallel Computing, 18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers. Volume 4339 of Lecture Notes in Computer Science, pages 362-376, Springer, 2005. [doi]

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