Jun Shirako, Munehiro Yoshida, Naoto Oshiyama, Yasutaka Wada, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara. Performance Evaluation of Compiler Controlled Power Saving Scheme. In Jesús Labarta, Kazuki Joe, Toshinori Sato, editors, High-Performance Computing - 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International Workshop on Advanced Low Power Systems, ALPS 2006, Revised Selected Papers. Volume 4759 of Lecture Notes in Computer Science, pages 480-493, Springer, 2005. [doi]
@inproceedings{ShirakoYOWNSKK05,
title = {Performance Evaluation of Compiler Controlled Power Saving Scheme},
author = {Jun Shirako and Munehiro Yoshida and Naoto Oshiyama and Yasutaka Wada and Hirofumi Nakano and Hiroaki Shikano and Keiji Kimura and Hironori Kasahara},
year = {2005},
doi = {10.1007/978-3-540-77704-5_45},
url = {http://dx.doi.org/10.1007/978-3-540-77704-5_45},
tags = {compiler},
researchr = {https://researchr.org/publication/ShirakoYOWNSKK05},
cites = {0},
citedby = {0},
pages = {480-493},
booktitle = {High-Performance Computing - 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International Workshop on Advanced Low Power Systems, ALPS 2006, Revised Selected Papers},
editor = {Jesús Labarta and Kazuki Joe and Toshinori Sato},
volume = {4759},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {978-3-540-77703-8},
}