Pratap Narayan Singh, Ashish Kumar, Chandrajit Debnath, Rakesh Malik. 20mW, 125 Msps, 10 bit Pipelined ADC in 65nm Standard Digital CMOS Process. In Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007, DoubleTree Hotel, San Jose, California, USA, September 16-19, 2007. pages 189-192, IEEE, 2007. [doi]
Abstract is missing.