An enhanced high performance combinational fault simulator using two-way parallelism

Steven P. Smith. An enhanced high performance combinational fault simulator using two-way parallelism. In Computer Design: VLSI in Computers and Processors, ICCD 1989. Proceedings., 1989 IEEE International Conference on, Cambridge, MA, USA, October 2-4, 1989. pages 294-297, IEEE, 1989. [doi]

Abstract

Abstract is missing.