Janusz Sosnowski, Tomasz Wabia, Tomasz Bech. Path Delay Fault Testability Analysis. In 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 25-27 October 2000, Yamanashi, Japan, Proceedings. pages 338, IEEE Computer Society, 2000. [doi]
Abstract is missing.