Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication

Ralf Stemmer, Maher Fakih. Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication. In Daniel Gro├če, Rolf Drechsler, editors, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, MBMV 2017, Bremen, Germany, February 8-9, 2017. pages 115-116, Shaker Verlag, 2017.

Abstract

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