A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors

Vladimir Stojanovic, R. Iris Bahar, Jennifer Dworak, Richard Weiss. A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors. In Ellen Sentovich, editor, Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006. pages 705-708, ACM, 2006. [doi]

Abstract

Abstract is missing.