500 MHz Delay Locked Loop Based 128-bin, 256 ns Deep Analog Memory ASIC Anusmriti - researchr publication

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Menka Sukhwani, Vinay Bhaskar Chandratre, Megha Thomas, C. K. Pithawa, Vangmayee Sharda. 500 MHz Delay Locked Loop Based 128-bin, 256 ns Deep Analog Memory ASIC Anusmriti . In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India. pages 72-77, IEEE Computer Society, 2011. [doi]

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