Multi retention level STT-RAM cache designs with a dynamic refresh scheme

Zhenyu Sun, Xiuyuan Bi, Hai Helen Li, Weng-Fai Wong, Zhong-Liang Ong, Xiaochun Zhu, Wenqing Wu. Multi retention level STT-RAM cache designs with a dynamic refresh scheme. In Carlo Galuzzi, Luigi Carro, Andreas Moshovos, Milos Prvulovic, editors, 44rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2011, 3-7 December 2011, Porto Alegre, Brazil. pages 329-338, ACM, 2011. [doi]

Authors

Zhenyu Sun

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Xiuyuan Bi

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Hai Helen Li

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Weng-Fai Wong

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Zhong-Liang Ong

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Xiaochun Zhu

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Wenqing Wu

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