A dual-mode architecture for fast-switching STT-RAM

Zhenyu Sun, Hai Li, Wenqing Wu. A dual-mode architecture for fast-switching STT-RAM. In Naresh R. Shanbhag, Massimo Poncino, Pai H. Chou, Ajith Amerasekera, editors, International Symposium on Low Power Electronics and Design, ISLPED'12, Redondo Beach, CA, USA - July 30 - August 01, 2012. pages 45-50, ACM, 2012. [doi]

Abstract

Abstract is missing.