3D rendering using FPGAs

Péter Szántó, Béla Fehér. 3D rendering using FPGAs. In Manfred Glesner, Ricardo Augusto da Luz Reis, Hans Eveking, Vincent John Mooney III, Leandro Soares Indrusiak, Peter Zipf, editors, IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003. pages 149-154, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 2003.

Authors

Péter Szántó

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Béla Fehér

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