Design and Optimization of Reliable Hardware Accelerators: Leveraging the Advantages of High-Level Synthesis

Farah Naz Taher, Mostafa Kishani, Benjamin Carrión Schäfer. Design and Optimization of Reliable Hardware Accelerators: Leveraging the Advantages of High-Level Synthesis. In Dimitris Gizopoulos, Dan Alexandrescu, Mihalis Maniatakos, Panagiota Papavramidou, editors, 24th IEEE International Symposium on On-Line Testing And Robust System Design, IOLTS 2018, Platja D'Aro, Spain, July 2-4, 2018. pages 232-235, IEEE, 2018. [doi]

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