VLSI architecture design of layer-based bilateral and median filtering for 4k2k videos at 30fps

Ming-Yi Tai, Wei-Chih Tu, Shao-Yi Chien. VLSI architecture design of layer-based bilateral and median filtering for 4k2k videos at 30fps. In IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017. pages 1-4, IEEE, 2017. [doi]

Authors

Ming-Yi Tai

This author has not been identified. Look up 'Ming-Yi Tai' in Google

Wei-Chih Tu

This author has not been identified. Look up 'Wei-Chih Tu' in Google

Shao-Yi Chien

This author has not been identified. Look up 'Shao-Yi Chien' in Google