A Shared-Bus Control Mechanism and a Cache Coherence Protocol for a High-Performance On-Chip Multiprocessor

Masafumi Takahashi, Hiroyuki Takano, Emi Kaneko, Seigo Suzuki. A Shared-Bus Control Mechanism and a Cache Coherence Protocol for a High-Performance On-Chip Multiprocessor. In HPCA. pages 314-322, 1996. [doi]

Abstract

Abstract is missing.